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From: Andrew Lunn <andrew@lunn.ch>
To: Dario Alcocer <dalcocer@helixd.com>
Cc: netdev@vger.kernel.org
Subject: Re: Marvell switch port shows LOWERLAYERDOWN, ping fails
Date: Sat, 7 Aug 2021 20:57:39 +0200	[thread overview]
Message-ID: <YQ7Xo3UII/1Gw/G1@lunn.ch> (raw)
In-Reply-To: <4902bb0e-87ad-3fa4-f7af-bbe7b43ad68f@helixd.com>

On Fri, Aug 06, 2021 at 04:46:08PM -0700, Dario Alcocer wrote:
> Andrew,
> 
> Using 5.13.8 resolves the LOWERLAYERDOWN issue I observed when bringing up a
> slave interface on 5.4.114. The interface comes up after a 15-second delay,
> with the Marvell PHY driver reporting a downshift event:
> 
> root@dali:~# ip addr add 192.0.2.1/24 dev lan1
> root@dali:~# ip link set lan1 up
> [  264.992698] socfpga-dwmac ff700000.ethernet eth0: Register
> MEM_TYPE_PAGE_POOL RxQ-0
> [  264.997303] socfpga-dwmac ff700000.ethernet eth0: No Safety Features
> support found
> [  264.998167] socfpga-dwmac ff700000.ethernet eth0: IEEE 1588-2008 Advanced
> Timestamp supported
> [  264.999357] socfpga-dwmac ff700000.ethernet eth0: registered PTP clock
> [  265.000804] socfpga-dwmac ff700000.ethernet eth0: configuring for
> fixed/gmii link mode
> [  265.002542] socfpga-dwmac ff700000.ethernet eth0: Link is Up - 1Gbps/Full
> - flow control rx/tx
> [  265.007121] mv88e6085 stmmac-0:1a lan1: configuring for phy/gmii link
> mode
> [  265.015320] 8021q: adding VLAN 0 to HW filter on device lan1
> [  265.016921] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
> root@dali:~# [  280.856989] Marvell 88E1540 mv88e6xxx-0:00: Downshift
> occurred from negotiated speed 1Gbps to actual speed 100Mbps, check cabling!

Humm, interesting. Two things pop to mind:

There is probably something wrong with your hardware. 1G requires 4
working pairs in the cable. If one pair is broken, the PHY will keep
trying to establish link, and fail. It will retry this a number of
times, and then drop to 100Mbps. That only requires 2 working pairs.
So get your hardware person to check the wiring from the switch to the
RJ-45 socket, and your cable.

Does the switch know the port is actually running at 100Mbps? 

> Detailed info from switch 0, port 0, corresponding to lan1 port:
> 
> root@dali:~# mv88e6xxx_dump --port 0 --device mdio_bus/stmmac-0:1a
> 00 Port status                            0x9d0f
>       Pause Enabled                        1
>       My Pause                             0
>       802.3 PHY Detected                   1
>       Link Status                          Up
>       Duplex                               Full
>       Speed                                100 or 200 Mbps
>       EEE Enabled                          0
>       Transmitter Paused                   0
>       Flow Control                         0
>       Config Mode                          0xf

O.K, so it does know the port is running at 100Mbps.

> Any ideas on how to get ICMP working, using the DSA single-port
> configuration example, are welcome.

Take a look at the port statistics. ethtool -S lan1 ? Do the counters
show the packets being sent out? They are probably broadcast packets,
ARP, not unicast ICMP.

Also ethtool -S eth0

At the end of the list, you see statistics for the CPU port.

   Andrew

  reply	other threads:[~2021-08-07 18:57 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-22 22:55 Dario Alcocer
2021-07-23 13:41 ` Andrew Lunn
2021-07-23 18:21   ` Dario Alcocer
2021-07-23 18:25     ` Andrew Lunn
2021-07-23 18:36       ` Dario Alcocer
2021-07-23 21:58         ` Dario Alcocer
2021-07-24 17:34           ` Andrew Lunn
2021-07-25  2:26             ` Dario Alcocer
2021-07-25  2:36               ` Dario Alcocer
2021-07-27  1:39                 ` Dario Alcocer
2021-07-28 18:07                   ` Dario Alcocer
2021-07-28 18:23                     ` Andrew Lunn
2021-07-28 18:33                       ` Dario Alcocer
2021-07-28 19:24                         ` Andrew Lunn
2021-07-28 19:37                           ` Dario Alcocer
2021-07-28 20:47                             ` Andrew Lunn
2021-07-28 20:54                               ` Dario Alcocer
2021-07-28 21:09                             ` Andrew Lunn
2021-08-05 21:44                             ` Dario Alcocer
2021-08-06 16:03                               ` Dario Alcocer
2021-08-06 23:46                                 ` Dario Alcocer
2021-08-07 18:57                                   ` Andrew Lunn [this message]
2021-08-09 16:28                                     ` Dario Alcocer
2021-08-10 20:58                                       ` Dario Alcocer
2021-08-10 22:13                                         ` Andrew Lunn
2021-08-11 13:16                                           ` Dario Alcocer
2021-08-07 17:44                               ` Andrew Lunn

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