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From: Florian Fainelli <f.fainelli@gmail.com>
To: Wong Vee Khee <vee.khee.wong@linux.intel.com>,
Andrew Lunn <andrew@lunn.ch>
Cc: Vivien Didelot <vivien.didelot@gmail.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Voon Weifeng <weifeng.voon@intel.com>,
Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>,
Vladimir Oltean <olteanv@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 1/2] net: pcs: xpcs: enable skip xPCS soft reset
Date: Wed, 11 Aug 2021 01:36:56 -0700 [thread overview]
Message-ID: <f2a1f135-b77a-403d-5d2e-c497efc99df7@gmail.com> (raw)
In-Reply-To: <20210810235529.GB30818@linux.intel.com>
On 8/10/2021 4:55 PM, Wong Vee Khee wrote:
> Hi Andrew,
> On Mon, Aug 09, 2021 at 03:35:09PM +0200, Andrew Lunn wrote:
>> On Mon, Aug 09, 2021 at 06:22:28PM +0800, Wong Vee Khee wrote:
>>> From: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>
>>>
>>> Unlike any other platforms, Intel AlderLake-S uses Synopsys SerDes where
>>> all the SerDes PLL configurations are controlled by the xPCS at the BIOS
>>> level. If the driver perform a xPCS soft reset on initialization, these
>>> settings will be switched back to the power on reset values.
>>>
>>> This changes the xpcs_create function to take in an additional argument
>>> to check if the platform request to skip xPCS soft reset during device
>>> initialization.
>>
>> Why not just call into the BIOS and ask it to configure the SERDES?
>> Isn't that what ACPI is all about, hiding the details from the OS? Or
>> did the BIOS writers not add a control method to do this?
>>
>> Andrew
>
> BIOS does configured the SerDes. The problem here is that all the
> configurations done by BIOS are being reset at xpcs_create().
>
> We would want user of the pcs-xpcs module (stmmac, sja1105) to have
> control whether or not we need to perform to the soft reset in the
> xpcs_create() call.
I understood Andrew's response as suggesting to introduce the ability
for xpcs_create() to make a BIOS call which would configure the SerDes
after xpcs_soft_reset(). That way the current xpcs_create() signature
would remain the same, but you could easily hook any post-reset
initialization by making an appropriate BIOS call.
--
Florian
next prev parent reply other threads:[~2021-08-11 8:37 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-09 10:22 [PATCH net-next 0/2] Intel AlderLake-S 2.5Gbps link speed support Wong Vee Khee
2021-08-09 10:22 ` [PATCH net-next 1/2] net: pcs: xpcs: enable skip xPCS soft reset Wong Vee Khee
2021-08-09 11:06 ` Vladimir Oltean
2021-08-10 23:50 ` Wong Vee Khee
2021-08-09 13:35 ` Andrew Lunn
2021-08-10 23:55 ` Wong Vee Khee
2021-08-11 8:36 ` Florian Fainelli [this message]
2021-08-11 14:20 ` Andrew Lunn
2021-08-26 11:50 ` Wong Vee Khee
2021-08-09 10:22 ` [PATCH net-next 2/2] stmmac: intel: Enable 2.5Gbps on Intel AlderLake-S Wong Vee Khee
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